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We try to speak plainly: what belongs on the open web and what is still bench work are spelled out on Research status. Good-faith corrections and sharp questions help us keep that line honest. If you need evaluation, licensing, a prototype, or an NDA conversation, start with Partners or Contact.

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Trade secrets — public lane

Phyllux treats trade secrecy + deliberate public disclosure as complementary tools: the public site and repos establish timeline, teaching context, and prior-art posture; partner lanes carry enabling detail under agreement. That split is intentional—it raises trust with technical buyers and collaborators without turning the public CDN into a leak surface.

Why say anything at all?

Two layers (conceptual)

Public layer: concepts, non-enabling diagrams, replication notes where safe, integrity manifests, blog and docs that pass publish review. Measured results appear when we choose to publish them and label uncertainty.

Protected layer: manufacturing recipes beyond public papers, undisclosed optimization parameters, partner-specific supplier terms, device attestation and key-lifecycle playbooks, private indices or tables used operationally, and counsel-strategy materials. Inner PhiKey/VAULT implementation detail follows PhiKey public positioning—not production-grade claims on the marketing surface.

Protection lanes (definitions)

Internally we tag each tracked item with how it may move (steward + counsel). On this page, PATENT-DRAFT means “may be candidate material if counsel ever chooses to pursue claims”—not a promise to file.

LaneMeaning on this site
TRADE SECRETNot published on phyllux.io. Kept under reasonable secrecy measures; enabling detail may appear only under mutual NDA for qualified partners.
PATENT-DRAFTMay be evaluated for patent disclosure per claim if counsel recommends—not a public spec dump.
NDAPartner-only: disclosed under mutual NDA (interfaces, procedures), not as a public tutorial.

Selective external filings remain exceptional—see IP overview. Day-to-day protection is still trade secrecy + deliberate public teaching.

Domain buckets (categories, not recipes)

Protected know-how is grouped the same way the technology story is grouped. The list below describes kinds of information—not filenames, serial numbers, or values.

BucketTypical trade-secret content (examples)What the public lane shows instead
WAVE (RF / GAFAA-class)Stack-ups, matching networks, multi-band tuning, calibration shortcuts that survive manufacture.Geometry intent, documentation goals, measured patterns when published; links to research status.
MESH (interfaces / placement)Electrode layouts, materials interfaces, biocompatibility process detail beyond public summaries.Research posture; non-clinical framing on this domain; no device clearance claims.
VAULT (PhiKey direction)Key schedules, rotation policies, binding recipes, operational vault procedures.Directional docs, decision trees, safe publish checklist—not audited product crypto claims.
CORE (integration)Cross-domain orchestration, internal buses, integration smoke tests tied to unreleased builds.Spine concepts at a high level; evidence rows on research status.
Engineering methodsProprietary algorithms, solver presets, lab notebooks not cleared for web.Method names or goals only when useful; otherwise omitted.
Manufacturing & testTolerances, yield tricks, vendor-specific instructions.Qualitative capability language or “measurement when published”—never secret tables.
Commercial opsPricing strategy drafts, partner-specific licensing arithmetic, unfinalized term sheets.Public tiers and routes live on Partners and licensing docs at the level we intend to stand behind.

Register index (TS-001–TS-050)

Codes, domains, and lanes match the steward register. The Public theme column is deliberately bland: it names the topic bucket only—no formulas, tolerances, key schedules, or step-by-step methods. For prior-art and disclosure timeline, use Proof; for evidence posture, Research status.

Lane codes: TS = TRADE SECRET, PD = PATENT-DRAFT, NDA = partner-only (mutual NDA).

CodeDomainLanePublic theme (non-enabling)
TS-001WaveTSRF impedance matching — golden-angle family
TS-002WavePDFeed / phase-center reference cluster
TS-003WaveTSHarmonic steering via element spacing
TS-004WaveTSMulti-band scaling strategies
TS-005WaveTSRadial scaling / sidelobe control
TS-006ENGENICAPDAdaptive redundancy geometry (engineering)
TS-007WaveTSFrequency-selective matching specifications
TS-008WavePDBeamforming phase reference cluster
TS-009WaveTSCoherent combining / aperture methods
TS-010WaveTSEnvironmental calibration / MEMS cluster
TS-011ENGENICAPDNested lattice scalability (engineering)
TS-012WaveNDACircular polarization — spiral family
TS-013WaveNDAWideband spiral transition
TS-014WavePDConformal surface mapping
TS-015WaveNDAMIMO beamforming — orthogonal spiral layout
TS-016WaveNDADistributed power / thermal feeds
TS-017WaveNDAArray calibration procedure cluster
TS-018manufacturingTSTolerance budget / yield envelope
TS-019MeshTSInterface coating sequence (biology)
TS-020MeshPDIrregular-surface placement planner
TS-021MeshTSNeural front-end / common-mode rejection
TS-022manufacturingTSFlexible substrate process specifications
TS-023MeshNDAChronic impedance monitoring
TS-024MeshTSTime-release biofactor formulation
TS-025testingNDASpectroscopy diagnostic classifier
TS-026MeshPDWireless power/data coupling
TS-027MeshPD3D helical placement extension
TS-028MeshNDAAcute penetrating array layout
TS-029MeshNDAHigh-density cortical grid layout
TS-030MeshNDAOpto-electrode integration layout
TS-031MeshNDAClosed-loop stimulation protocol
TS-032MeshTSAlternate coating fallbacks
TS-033MeshNDAElectrode material trade study
TS-034MeshNDASurgical tooling / technique cluster
TS-035VaultTSKey derivation layer (geometry-bound)
TS-036VaultTSEncryption construction cluster (Vault)
TS-037VaultTSHardware fingerprinting / noise harvest
TS-038VaultTSCross-domain integrity checksum bundle
TS-039VaultTSKey schedule / transform cluster
TS-040VaultPDLattice embedding (post-quantum oriented)
TS-041ENGENICAPDCycle-based error handling (engineering)
TS-042VaultTSKey mixing schedule (phyllotactic)
TS-043VaultNDAEnvironmental entropy harvesting
TS-044VaultNDAMulti-party key agreement
TS-045VaultNDAStructured encryption on geometric keys
TS-046VaultNDACommitment / proof constructions (121-node)
TS-047VaultNDASignature family (spiral lattice)
TS-048CoreTSCross-domain translation engine
TS-049CoreTSHub multiplexing schedule
TS-050business opsTSCommercial tier partition map

Lane counts (steward register): TRADE SECRET 24 · PATENT-DRAFT 8 · NDA 18. Categories span Wave, Mesh, Vault, Core, ENGENICA, manufacturing, testing, and business ops.

Inventory scope (high level)

The fifty rows above are the bounded inventory discussed with partners. It replaces vague “dozens of secrets” language with a numbered map—still without enabling disclosure.

What we never ship in the static site tree

Aligned with Safe public publish and repo hygiene:

External-safe habits (summary)

Related links

IP overview · Research status · Proof · Safe publish · Open resource · LICENSE-IP-NOTICE (GitHub) · Partners